By Paul M. Brown Jr.

ISBN-10: 0121369706

ISBN-13: 9780121369705

ISBN-10: 032315476X

ISBN-13: 9780323154765

Program particular built-in circuits (ASICs), either analog and electronic, became usual process point bulding blocks. ASIC owners have tried to supply instruments that they desire will let fairly green IC designers (i.e. platforms engineers) to layout subtle customized built-in circuits. This philosophy has been extra winning in electronic know-how than in analog. considerably extra artwork is concerned with analog layout and much fewer automatic instruments can be found. virtually each analog ASIC seller bargains varied semiconductor applied sciences, instrument units, documentation (usually missing intimately and never offering the correct heritage and guidelines), and ranging degrees of engineering help. the result's that many engineers who may possibly use analog ASICs lack the technical info to take action. they don't seem to be certain while customized analog ICs are low in cost or which seller will most sensible serve their wishes. additionally, many engineers shouldn't have sufficient analog layout event, in particular with built-in circuits. Consqeuently, many that may gain advantage from analog ASIC know-how don't use it whereas others have undesirable studies which can have simply been shunned.

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However, the small amount of wasted silicon is more than made up for by the layout flexibility gained by having transistors play a dual role. The npn and lateral pnp transistors are most frequently used to make diodes. Vertical pnp transistors could be used for some specialized clamping function but are very limited since their collector (cathode) is com­ mitted to the negative supply (substrate). Using the terminals of any other component, such as a resistor, to make a diode is highly undesir­ able.

Hybrid-7r Model The small-signal "linearized" version of the model, illustrated in Fig­ ure 3-11, is the well-known hybrid-^ model. In this model, the com­ ponents are determined as follows: l"cc' l"ee' Tb'e Ib'c' = (same as for Ebers-Moll) = (same as for Ebers-Moll) = (same as for Ebers-Moll) = kT/qI = kT/qI e ec Cb'e' C cs = (same as for Ebers-Moll) The component r < is used to simulate collector-base leakage I and is frequently assumed to be infinite. A detailed derivation of these models can be found in Reference 6.

Figure 3-18 shows the model elements in a lateral pnp. The Early voltage for lateral pnp transistors is typically 80 to 100 V. Their output impedance is therefore one-half to one-third that of npn transistors. This fact has a significant impact on realizable gain when using lateral pnp transistors as current source collector loads or as gain stages. Table 3-6 gives typical lateral pnp characteristics. Vertical pnp Transistors Vertical pnp transistors are similar to laterals in that a base diffusion is used for the emitter and the epi is the base.

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A Guide to Analog Asics by Paul M. Brown Jr.

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